layout simulation中文是什么意思

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中文翻译
造句

布局模拟

layout 安放,布置,划线; 摆放; 版面编排；版面设计; 版图; 布局，安排，设计; 布局，可以将目前的视图设置保存为一种布局; 布局设计；设计；规划图; 布图设计; 布线; 布置，配置; 布置，平面图; 布置方案; 布置规则; 草图; 场地设计; 陈设配置; 电路设计的配置电路图磁盘布局打印格式敷设线路格式工厂设备布置配置配置图规划总体布置布局布局配置版面编排形式设计图案; 定线; 动画美术设计指动画影片中人物和背景的造型设计，也指负责这个工作的人。; 方案图; 观测系统；设计；安排; 观测站; 广告布局（版式）; 规划设计布置图; 规划,设计,编排,版面,配线,企划,设计图案,布局图,版面设计; 规划设计；设计；规划图; 及多腔模布局; 流层布置; 流程布置; 轮廊; 没计; 排唛，排料; 平面布置; 设计，广告图样; 设计；规划设计；规划图; 设计划线; 设置分屏预览的布局; 身体与横杆平行的过杆法; 数法表; 图面布局; 外形图; 下料; 线路图; 牙轮钻头啮合图; 总体布局
simulation n. 假装；模拟；装病，装疯；【生物学】拟态，拟色。
liquid simulation fluid simulation 流体仿真; 流体模拟; 液体仿真; 液体模拟
accommodation layout 舱室布置
aircraft layout 飞机设计布局
airspace layout 空域设计
algorithm, layout 布局算法
align layout 亚洲方式配置
alternate layout 比较布置; 比较设计; 交互比较草图设计; 平面布置比较方案
alternative layout 比较布置方案
approved layout 核准图则
array layout 阵列布图
assembly layout 装配设计方案
asymmetrical layout 广告初稿的编排草稿
auto layout 自动布局; 自动排列
automated layout 自动规划
basic layout 基本布置图
bathroom layout 浴室布置
bench layout 台上书线
bg layout 背景设计稿
biplane layout 双翼机设计方案
blank layout 排样; 胚科布置; 胚料布列; 坯件布置
blanking layout 坯件布置
blast layout 装药布置
blasting layout 爆破布置; 爆破点布置

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例句与用法

After circuit simulation, layout and post-layout simulation, the chip is taped-out successfully in a famous abroad foundry
完成电路前仿真、版图设计和后仿真工作后在境外一著名工艺线流片。
Analog ip verification, including schematic simulation, post layout simulation, chip performance test, ate test for mass production, etc
对芯片中的模拟ip进行验证，包括原理设计仿真、布线后的后仿真、实际芯片相关部分的性能测试、量产测试等等。
In charge of the analog ip verification, including schematic simulation, post layout simulation, chip performance test, ate test for mass production, etc
对芯片中的模拟ip进行验证，包括原理设计仿真、布线后的后仿真、实际芯片相关部分的性能测试、量产测试等等。
And the process of functional verification consists of the implementation of rtl ( register transfer level ) simulation, gate level simulation and post-layout simulation in the process of design
验证最关键的是测试方案的制定，而功能验证的过程是在于在设计过程中实施rtl级仿真、门级仿真和后仿真。
In the conclusion of this thesis, the research value of this circuit was pointed out, but it was suggested that corner simulation and post-layout simulation should be indispensable
在论文的结论部分,作者指出该电路在理论研究上的可参考性,同时也表明了该电路欲投入生产则还需要做容差分析和后仿真等后续工作。
In this article, i suggested a new design method of regular logic cells and the micro-instruction rom basing on the cadence environment, also i put forward a novel post-layout simulation flow base on the eda tool-- powermill
在本文中，笔者提出了在cadence平台的利用编程实现规则逻辑版图以及微码rom码点的设计方法和基于powermill工具的后仿真版图验证流程。
Chapter 5 gives the design illumination of the rs coder and decoder based on fpga . then it gives the integrated results for realization design of the rs ( 31, 15 ) error-correcting code . after that, it gives the functional and layout simulation results for the limited field multiplier, divider, rs coder and rs de-coder
第五章给出了基于fpga实现的rs编码器和译码器设计说明,rs(31,15)纠错码设计实现的综合结果,有限域乘法器、除法器、rs编码器、rs译码器的功能仿真和布局布线后仿真结果,最后总结主要的调试经验。
The research fruit of this item rest with three points : one is that having complete the system design of the simulation system of high-power laser driver; the second is that having complete the design and development of logic layout simulation and science visualizing system, and complete the mathematics modeling and component modeling of laser components . and the last is that having complete the primary research of distribute interactive simulation ( dis ) and virtual reality ( vr ), set up the basic model and realize some of these models
本课题的研究成果主要武汉理工大学硕士学位论文有三个：一是完成了高功率激光驱动器的仿真模拟系统的系统设计；二是基本完成了逻辑布局仿真和科学可视化系统的设计和开发，完成了大部分激光器元件的数学建模和组件化；三是对分布式交互仿真和虚拟布局进行了初步的探索，建立了基本的模型，并实现了部分模型。
The design flow includes the construction of basic cell libraries, placing & routing, layout verification and post-layout simulation, etc . moreover, the layout design of basic cells and functional modules, the measures of circuit protection and methods to reduce the parasitic effect are also been discussed
这个流程介绍了与intelm80c287协处理器完全兼容的协处理器的后端设计过程。介绍了协处理器设计过程中基本单元和一些主要功能模块的设计，以及设计中的保护措施和减少寄生效应的设计方法。
Focusing on a 64-bit high-performance general purpose microprocessor with fully independent intellectual property, the thesis investigates a 128-word 65-bit general register file with 12-read and 8-write ports which is a representational one for its large-scale and multi-port characteristics in that microprocessor, and realizes its full custom design with high speed in read and write access . from the layout simulation result, under the 0.18um process, the upper limit working frequency for the register file is 900mhz
本文面向一款具有完全自主知识产权的64位高性能通用处理器,对其中具有代表性的128字65位12读端口和8写端口的通用寄存器文件进行研究,实现了它的高速读写全定制设计,版图模拟结果表明,在0.18um工艺下,设计可以工作的时钟频率上限为900mhz。

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Last modified time:Fri, 15 Aug 2025 00:29:56 GMT